{"id":174820,"date":"2016-02-04T08:53:18","date_gmt":"2016-02-04T08:53:18","guid":{"rendered":"https:\/\/www.uph.edu\/2016\/02\/04\/penutupan-rangkaian-sesi-workshop-fpga\/"},"modified":"2016-02-04T08:53:18","modified_gmt":"2016-02-04T08:53:18","slug":"penutupan-rangkaian-sesi-workshop-fpga","status":"publish","type":"post","link":"https:\/\/www.uph.edu\/id\/2016\/02\/04\/penutupan-rangkaian-sesi-workshop-fpga\/","title":{"rendered":"Penutupan Rangkaian Sesi Workshop FPGA"},"content":{"rendered":"

Kamis, 4 Februari 2016, Jurusan Teknik Elektro UPH menggelar sesi ke-4 dari rangkaian workshop FPGA di yang dibawakan oleh Dr. Ian Grout dari University of Limerick Irlandia. <\/p>\n

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\"pilih_foto_bersama_Fp.JPG\"<\/div>\n
Foto Bersama Peserta Workshop, Dosen Teknik Elektro dengan Dr. Ian Grout<\/span><\/div>\n
 <\/div>\n<\/td>\n<\/tr>\n
\n

 <\/p>\n

Kamis, 4 Februari 2016, Jurusan Teknik Elektro  UPH menggelar sesi ke-4 dari rangkaian workshop FPGA di yang dibawakan oleh Dr. Ian Grout dari University<\/em> of Limerick Irlandia.<\/span><\/p>\n

 <\/p>\n

Pada sesi  terakhir tersebut Dr. Grout membahas beberapa teknik untuk pemrograman VHDL seperti proses, operator aritmatik, operator Boolean<\/em>, operator concatenation<\/em>, looping<\/em>, dan perintah-perintah conditional<\/em>. Dalam workshop <\/em>ini Dr. Grout juga menunjukkan kesalahan yang umumnya terjadi dalam pembuatan proses, dimana ada unsur sensitivity list<\/em> yang tidak lengkap yang menjadi pemicu terjadinya kesalahan timing<\/em> diagram saat dilakukan simulasi.<\/span><\/p>\n

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 \"Pilih_Dr._Grout.JPG\"<\/div>\n
Dr. Ian Menjelaskan Materi FPGA<\/span><\/div>\n
 <\/div>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Selain itu ditunjukkan juga kode VHDL untuk membuat 3-input AND gate, D-type flip-flop<\/em> dengan asynchronous<\/em> reset dengan I\/O yang berupa bus atau multi bit, binary counter<\/em> 24 bit, pembangkitan clock<\/em> untuk test bench<\/em>, penggunaan counter<\/em> untuk menjadi clock divider<\/em>, dan pembuatan state machines<\/em> dengan VHDL dan implementasinya ke board Altera Quartus II.<\/span><\/p>\n

 <\/p>\n

Selesainya sesi terakhir ini, juga menandai selesainya seluruh rangkaian workshop<\/em> FPGA. Di bulan Juni mendatang Dr. Ian Grout akan kembali datang untuk memberikan workshop<\/em> mengenai pemakaian Arduino<\/em> untuk signal processing <\/em>seperti untuk digital filtering, discrete Fourier Transform<\/em>, serta interfacing Arduino<\/em> ke PC untuk keperluan data acquisition dan visualisasi.<\/span><\/p>\n

 <\/p>\n

Melalui kesempatan ini juga, Dr. Grout memberikan kesan-kesannya terhadap kunjungannya yang pertama kali di Indonesia. ?Saya sangat berterima kasih atas kesempatan yang diberikan bagi saya yang disambut begitu ramah oleh UPH. Ini adalah kunjungan saya yang pertama kali di Indonesia. Ada banyak hal baik di Indonesia seperti orang-orang yang sangat ramah, baik, dan mudah bergaul. Meskipun saya tidak memiliki banyak waktu luang, tapi hanya dengan tinggal beberapa waktu di sekitar Karawaci ini dan bertemu dengan kalian sungguh pengalaman yang sangat baik,? ungkap Dr. Grout.  Tentunya melalui kelas dan workshop <\/em>dari bulan Januari hingga Februari, Dr. Grout berharap bahwa yang diberikannya di UPH ini dapat berguna, seperti topik FPGA yang dibawakannya dalam empat kali workshop. Dr. Grout berharap kedepannya UPH terus melakukan banyak praktek dan terus menggali kegunaan FPGA, dan menemukan manfaat-manfaat lainnya dari FPGA ini.<\/span><\/p>\n

 <\/p>\n

Sesi akhir ini ditandai dengan pemberian sertifikat kepada peserta yang mengikuti rangkaaian workshop ini secara lengkap dan juga foto bersama antara Dr. Ian Grout dengan beberapa dosen-dosen dari Teknik Elektro UPH. (HU\/Mt)<\/span>.<\/p>\n<\/td>\n<\/tr>\n

  <\/p>\n\n\n\n
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 \"Pilih_Cinderamata.JPG\"<\/div>\n
Pemberian Cinderamata dari Pihak Teknik Elektro UPH<\/span><\/div>\n
Kepada Dr. Ian Grout<\/span><\/div>\n<\/td>\n
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\"Pilih_sertifikat.JPG\"<\/div>\n
Pemberian Sertifikat Kepada<\/span><\/div>\n
Peserta yang Menghadiri Seluruh Rangkaian Workshop<\/em><\/span><\/div>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table><\/div>\n

 <\/p>\n","protected":false},"excerpt":{"rendered":"

Kamis, 4 Februari 2016, Jurusan Teknik Elektro UPH menggelar sesi ke-4 dari rangkaian workshop FPGA di yang dibawakan oleh Dr. Ian Grout dari University of Limerick Irlandia.<\/p>\n","protected":false},"author":12,"featured_media":0,"parent":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"inline_featured_image":false,"footnotes":""},"categories":[990],"tags":[],"class_list":["post-174820","post","type-post","status-publish","format-standard","hentry","category-uncategorized-id"],"acf":[],"yoast_head":"\nPenutupan Rangkaian Sesi Workshop FPGA - UPH | Universitas Pelita Harapan<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.uph.edu\/id\/2016\/02\/04\/penutupan-rangkaian-sesi-workshop-fpga\/\" \/>\n<meta property=\"og:locale\" content=\"id_ID\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Penutupan Rangkaian Sesi Workshop FPGA\" \/>\n<meta property=\"og:description\" content=\"Kamis, 4 Februari 2016, Jurusan Teknik Elektro UPH menggelar sesi ke-4 dari rangkaian workshop FPGA di yang dibawakan oleh Dr. Ian Grout dari University of Limerick Irlandia.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.uph.edu\/id\/2016\/02\/04\/penutupan-rangkaian-sesi-workshop-fpga\/\" \/>\n<meta property=\"og:site_name\" content=\"UPH | Universitas Pelita Harapan\" \/>\n<meta property=\"article:publisher\" content=\"https:\/\/www.facebook.com\/UPHImpactlives\" \/>\n<meta property=\"article:published_time\" content=\"2016-02-04T08:53:18+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/olduph.verken.id\/wp-content\/uploads\/2016\/02\/images_pilih_foto_bersama_Fp.JPG\" \/>\n<meta name=\"author\" content=\"Contact Us\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:creator\" content=\"@contact.us@uph.edu\" \/>\n<meta name=\"twitter:site\" content=\"@uphimpactslives\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"Contact Us\" \/>\n\t<meta name=\"twitter:label2\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data2\" content=\"2 menit\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\/\/www.uph.edu\/id\/2016\/02\/04\/penutupan-rangkaian-sesi-workshop-fpga\/#article\",\"isPartOf\":{\"@id\":\"https:\/\/www.uph.edu\/id\/2016\/02\/04\/penutupan-rangkaian-sesi-workshop-fpga\/\"},\"author\":{\"name\":\"Contact Us\",\"@id\":\"https:\/\/www.uph.edu\/#\/schema\/person\/78791daa4a3a0cdc6d18bba12468d141\"},\"headline\":\"Penutupan Rangkaian Sesi Workshop FPGA\",\"datePublished\":\"2016-02-04T08:53:18+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\/\/www.uph.edu\/id\/2016\/02\/04\/penutupan-rangkaian-sesi-workshop-fpga\/\"},\"wordCount\":431,\"commentCount\":0,\"publisher\":{\"@id\":\"https:\/\/www.uph.edu\/#organization\"},\"image\":{\"@id\":\"https:\/\/www.uph.edu\/id\/2016\/02\/04\/penutupan-rangkaian-sesi-workshop-fpga\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/olduph.verken.id\/wp-content\/uploads\/2016\/02\/images_pilih_foto_bersama_Fp.JPG\",\"articleSection\":[\"Uncategorized\"],\"inLanguage\":\"id-ID\",\"potentialAction\":[{\"@type\":\"CommentAction\",\"name\":\"Comment\",\"target\":[\"https:\/\/www.uph.edu\/id\/2016\/02\/04\/penutupan-rangkaian-sesi-workshop-fpga\/#respond\"]}]},{\"@type\":\"WebPage\",\"@id\":\"https:\/\/www.uph.edu\/id\/2016\/02\/04\/penutupan-rangkaian-sesi-workshop-fpga\/\",\"url\":\"https:\/\/www.uph.edu\/id\/2016\/02\/04\/penutupan-rangkaian-sesi-workshop-fpga\/\",\"name\":\"Penutupan Rangkaian Sesi Workshop FPGA - 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